Tue, Dec 9^th 2025 Pierce Hall 209

AGENDA
– Topic 1 = SPTS/RIE 11:00am -12:30pm
– Lunch break = 12:30pm -1:30pm
– Topic 2 = SPTS/PECVD 1:30pm -3 :00pm

SPEAKER
Brian Yount
KLA Corporation, SPTS Division
(Speaker Bio will be updated shortly)

REGISTRATION LINK
https://cns1.rc.fas.harvard.edu/training-sign-up/?eid=49050

ABSTRACTS

Topic 1: Etch (ICP) Tue, Dec 9^th 11:00-12:30pm

This presentation provides an in-depth overview of the Omega Inductively Coupled Plasma (ICP) Etch platform, tailored for advanced microfabrication research and development. The Omega ICP system supports a wide range of wafer sizes (75–200 mm) and is compatible with multiple process modules, including LPX, c2L, fxP, and Versalis cluster platforms. The platform’s modularity enables integration of etch, CVD, PVD, and other process technologies, making it highly adaptable for both R&D and high-volume manufacturing. Key features include robust electrostatic clamping, advanced endpoint detection methods (such as optical emission spectroscopy and white light interferometry), and precise temperature control for both cold and hot platen operations. The ICP module excels in etching a diverse array of materials—dielectrics, metals, III-V compounds (e.g., GaAs, InP, GaN), and organics—while supporting low-damage etch processes via HALO low-power biasing.

Application examples demonstrate high etch rates, excellent uniformity, and steep profile control for complex structures such as VCSEL stacks, LEDs, and MEMS devices. The system’s flexibility, process stability, and proven hardware reliability position Omega ICP as a leading solution for compound semiconductor etching and advanced device fabrication in academic and industrial settings.

Topic 2: Deposition (PECVD) Tue, Dec 9^th 1:30-3:00pm

This presentation introduces the Delta PECVD platform, a versatile solution for advanced thin film deposition in microfabrication, as developed by SPTS Division. Delta PECVD supports a wide range of applications, including MEMS, sensors, power electronics, RF, photonics, quantum, and advanced packaging. The system’s modular single-wafer architecture enables precise control over film stress, uniformity, and repeatability, accommodating wafer sizes from 75 mm to 300 mm. Key innovations include active air-cooled platen temperature control (80°C–400°C), patented RPS NF₃ chamber cleaning for enhanced productivity, and edge-contact PECVD for backside deposition.

The platform offers a broad selection of dielectric films—such as SiO₂, SiN, SiON, α-Si, α-C, and TEOS—optimized for low-temperature processing and high-quality step coverage. Stress tuning via RF power modulation allows for both compressive and tensile states, essential for thin wafer and gap-fill applications. Case studies highlight low-temperature TEOS trench fill, TSV last liner deposition, and amorphous silicon and carbon films for MEMS and photonics. Delta PECVD demonstrates high throughput, robust electrical isolation, and stable film properties, positioning it as a leading technology for next-generation semiconductor manufacturing.